DocumentCode :
3038827
Title :
Impact of line edge roughness and linewidth roughness on critical dimension variation
Author :
Zhao, Fengxia ; Wang, Qinghai ; Zhang, Linna ; Jiang, Zhuangde
Author_Institution :
Sch. of Mech. Eng., Zhengzhou Univ., Zhengzhou, China
Volume :
3
fYear :
2012
fDate :
25-27 May 2012
Firstpage :
475
Lastpage :
479
Abstract :
To investigate the line edge roughness (LER) and linewidth roughness (LWR) impact on critical dimension (CD) variation for gates, three characterization models of LER/LWR are present, the LER/LWR line edges with the self-affine behavior are simulated, and the relationship between the CD variation and the parameters of LER/LWR are found out. The results show that without any other sources of variation, LER/LWR can cause gate line-width variation, and its effect on the CD variation is of first-order.
Keywords :
MOSFET; semiconductor device models; CD variation; LER; LWR; critical dimension variation; gate line-width variation; line edge roughness; linewidth roughness; self-affine behavior; Correlation; Educational institutions; Logic gates; Optical surface waves; Optical waveguides; Rough surfaces; Surface roughness; critical dimension variation; line edge roughness (LER); linewidth roughness (LWR); simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Automation Engineering (CSAE), 2012 IEEE International Conference on
Conference_Location :
Zhangjiajie
Print_ISBN :
978-1-4673-0088-9
Type :
conf
DOI :
10.1109/CSAE.2012.6272996
Filename :
6272996
Link To Document :
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