A CMOS Analog Frontend for a Passive UHF RFID Tag

Author

Facen, Alessio ; Boni, Andrea

Author_Institution

Dipt. di Ingegneria dell´´ Informazione, Parma Univ.

fYear

2006

fDate

4-6 Oct. 2006

Firstpage

280

Lastpage

285

Abstract

The paper discusses the design of the analog frontend of a passive UHF RFID tag, compatible with ISO/IEC 18000-6b standard. An efficient ESD-protected power retrieving circuit, based on the antenna features, a rectifier bridge and a charge pump, is introduced, as well as an auto-calibrated clock generator. The chip, implemented in a 0.18mum digital CMOS technology, does not need any post-fabrication trimming or external component besides the antenna; according to simulations, a correct communication is achieved at a distance of several meters between reader and tag

Keywords

CMOS analogue integrated circuits; CMOS digital integrated circuits; UHF integrated circuits; electrostatic discharge; power supply circuits; radiofrequency identification; 0.18 micron; CMOS analog frontend; ESD protection; ISO/IEC 18000-6b standard; auto-calibrated clock generator; charge pump; digital CMOS technology; passive UHF RFID tag; power retrieving circuit; rectifier bridge; Antenna accessories; Bridge circuits; CMOS technology; Charge pumps; Clocks; IEC standards; ISO standards; Passive RFID tags; Power generation; Rectifiers; Design; UHF integrated circuits; electromagnetic coupling;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, 2006. ISLPED'06. Proceedings of the 2006 International Symposium on

Conference_Location

Tegernsee

Print_ISBN

1-59593-462-6

Type

conf

DOI

10.1109/LPE.2006.4271850

Filename

4271850