Title :
ESD detection circuit with reverse-used RC network in a 90-nm CMOS process
Author :
Yang, Z.N. ; Liu, H.X. ; Wang, S.L.
Author_Institution :
Sch. of Microelectron., Xidian Univ., Xi´an, China
Abstract :
The gate leakage current issue in nanometer CMOS process is serious. An ESD detection circuit with reverse-used RC network is proposed in a 90-nm CMOS process. It reduces the leakage current in RC network by reducing the area of MOS capacitor and avoiding high voltage drop across MOS capacitor. The leakage current is 5.7 nA at 25°C. The total capacitor area used is only 4 μm2. Under ESD event, it can generate 39 mA trigger current to turn on the SCR.
Keywords :
CMOS integrated circuits; MOS capacitors; MOS-controlled thyristors; RC circuits; electrostatic discharge; leakage currents; ESD detection circuit; MOS capacitor; SCR; current 39 mA; current 5.7 nA; gate leakage current issue; nanometer CMOS process; reverse-used RC network; size 90 nm; temperature 25 degC; CMOS integrated circuits; CMOS process; Clamps; Decision support systems; Electrostatic discharges; Failure analysis;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location :
Suzhou
Print_ISBN :
978-1-4799-1241-4
DOI :
10.1109/IPFA.2013.6599228
