A high speed, high Radix 32-bit Redundant parallel multiplier

In this paper, Radix-256 encoding scheme is used to reduce the number of partial products and Redundant binary (RB) number systems is used because of its unique carry propagation free addition property. RB number system was used to represent any of 257 multiplying coefficients as a RB number which consists of two of 16 fundamental multiplying coefficients. In the present work inputs are considered of 32-bit. So, only four partial product rows are obtained in RB form, these four partial product rows are added using carry free RB addition. Finally the RB output is converted back to natural binary (NB) form using RB to NB converter. The performance of proposed multiplier implementation is compared with traditional Wallace tree multiplier implementation in 130nm technology. We show that the delay performance of the proposed architecture improves by 25% respectively with respect to traditional Wallace tree multiplier implementation.