Title :
Fast and accurate programming method for multi-level NAND EEPROMs
Author :
Hemink, G.J. ; Tanaka, T. ; Endoh, T. ; Aritome, S. ; Shirota, R.
Author_Institution :
ULSI Res. Center, Toshiba Corp., Kawasaki, Japan
Abstract :
For the replacement of conventional hard disks by NAND EEPROMs, a very high density and a high programming speed are required. An increased density can be achieved by using multi-level memory cells. With the new method, using staircase programming pulses combined with a bit-by-bit verify, a very narrow threshold voltage distribution of 0.7 V, necessary for 4-level or 2-bit operation, and a high programming speed of 300 /spl mu/s/page or 590 ns/byte can be obtained.
Keywords :
EPROM; NAND circuits; PLD programming; cellular arrays; integrated memory circuits; 0.7 V; bit-by-bit verify; multi-level NAND EEPROMs; multi-level memory cells; programming method; programming speed; staircase programming pulses; threshold voltage distribution; EPROM; Electrons; Nonvolatile memory; Pulse measurements; Pulse shaping methods; Shape measurement; Threshold voltage; Tunneling; Ultra large scale integration; Voltage control;
Conference_Titel :
VLSI Technology, 1995. Digest of Technical Papers. 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7803-2602-4
DOI :
10.1109/VLSIT.1995.520891
