Title :
A 1.2 mu m BiCMOS 100 MHz sample-and-hold circuit with a constant-impedance slew-enhanced sampling gate
Author :
Wakayama, M.H. ; Tanimoto, H. ; Tasai, T. ; Yoshida, Y.
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
A constant-impedance sampling-gate architecture is presented which uses two pairs of diodes to form two switches that perform alternate-cycle sampling. While output 1 is in the sample mode, output 2 is in the hold mode, and vice versa. As with diode-bridge sampling gate-architectures, 460-MHz input bandwidth and 150-MHz sample rate are achieved.<>
Keywords :
BiCMOS integrated circuits; sample and hold circuits; 1.2 micron; 100 MHz; 150 MHz; 460 MHz; BiCMOS; alternate-cycle sampling; bandwidth; constant-impedance sampling-gate architecture; sample rate; sample-and-hold circuit; slew-enhanced sampling gate; two pairs of diodes; BiCMOS integrated circuits; Clamps; Diodes; Impedance; Mirrors; Resistors; Sampling methods; Switches; Switching circuits; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1992. Digest of Technical Papers. 39th ISSCC, 1992 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0573-6
DOI :
10.1109/ISSCC.1992.200481
