Design of a custom processing unit based on Intel i486 architectures and performances trade-offs

The architecture of a customized processing unit using an Intel i486 microprocessor as an efficient general-purpose processor is described. The objectives for the optimization of the i486 performances are: the design of a set of customized support chips to control the processor bus, the memory management, the arbitrations, the interrupts, and the I/O data transfer; the use of 80-ns DRAM (dynamic random access memory) 4 Mb modules; and an arbitration scheme that prioritizes DMA (direct memory access) data transfer at a sustained rate of 10 MB/s. System performance variation due to critical design parameters such as cache hit rate and memory access time is analyzed with a detailed simulation model of the complete processor system