A low thermal budget, fully self-aligned lateral BJT on thin film SOI substrate for low power BiCMOS applications

Author

Chen, V.M.C. ; Woo, J.C.S.

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1995

fDate

6-8 June 1995

Firstpage

133

Lastpage

134

Abstract

A novel SDE LBJT on TFSOI substrate has been demonstrated. The fabrication process is self-aligned, with a minimum thermal budget, and is fully compatible with an SOI CMOS process. Good electrical results were obtained. The devices are expected to have good current drive and high frequency performance for low power applications.

Keywords

BiCMOS integrated circuits; bipolar transistors; characteristics measurement; silicon-on-insulator; current drive; electrical results; fabrication process; fully self-aligned lateral BJT; high frequency performance; low power BiCMOS applications; symmetric dual emitter; thermal budget; thin film SOI substrate; BiCMOS integrated circuits; CMOS process; Driver circuits; Etching; Fabrication; Implants; Integrated circuit interconnections; Substrates; Thermal engineering; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1995. Digest of Technical Papers. 1995 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

0-7803-2602-4

Type

conf

DOI

10.1109/VLSIT.1995.520893

Filename

520893

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3039867