DocumentCode :
3039911
Title :
Effect of gate structures on ESD characteristics in SOI MOS device
Author :
Yujuan He ; Hongwei Luo ; Qingzhong Xiao
Author_Institution :
Sci. & Technol. on Reliability Phys. & Applic. of Electr. Component Lab., Guangzhou, China
fYear :
2013
fDate :
15-19 July 2013
Firstpage :
745
Lastpage :
748
Abstract :
The ESD characteristic of SOI NMOSFET with different gate structures was studied. It was indicated that the ESD robustness ability was the strongest in gate around source (GAS) structure and was the weakest in enclosed gate structure in SOI NMOSFET. This was probably related to interested areas and current density.
Keywords :
MOSFET; current density; electrostatic discharge; silicon-on-insulator; ESD characteristics; ESD robustness ability; GAS structure; SOI MOS device; SOI NMOSFET; Si; current density; gate around source structure; Electrostatic discharges; Heating; Indexes; Logic gates; MOSFET circuits; RNA; Reliability; ESD protection; GGNMOS; SOI; TLP test;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location :
Suzhou
ISSN :
1946-1542
Print_ISBN :
978-1-4799-1241-4
Type :
conf
DOI :
10.1109/IPFA.2013.6599268
Filename :
6599268
Link To Document :
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