Title :
Real-time clustering for pixel detectors: The DCE3 ASIC for the PXD detector in the Belle II experiment @KEK
Author :
Wassatsch, Andreas ; Richter, Rainer H.
Author_Institution :
Max-Planck-Inst. for Phys., Munich, Germany
Abstract :
In this paper we describe the utilization of a hardware based clustering engine in the data acquisition chain of a particle collider experiment. The data clustering engine (DCE) can execute the clustering task in a pipelined data stream mode with a latency of only one frame by utilization of a software-inspired hardware architecture. The scalable architecture of the clustering core allows a quick adaption of the engine to the specific needs of the target application. Furthermore, a prototype implementation in a TSMC 65nm low power CMOS process and an outlook on the final design for the Belle II experiment at KEK/Japan will be presented.
Keywords :
CMOS integrated circuits; application specific integrated circuits; data acquisition; high energy physics instrumentation computing; pattern clustering; pipeline processing; real-time systems; semiconductor counters; signal processing; Belle II experiment; DCE3 ASIC; KEK; PXD Detector; TSMC; data acquisition chain; data clustering engine; engine adaption; hardware based clustering engine; low power CMOS process; particle collider experiment; pipelined data stream mode; pixel detector; prototype implementation; real-time clustering; scalable clustering core architecture; software-inspired hardware architecture; target application; Algorithm design and analysis; Clustering algorithms; Data acquisition; Detectors; Engines; Signal processing algorithms; Software algorithms;
Conference_Titel :
Real Time Conference (RT), 2012 18th IEEE-NPSS
Conference_Location :
Berkeley, CA
Print_ISBN :
978-1-4673-1082-6
DOI :
10.1109/RTC.2012.6418117