DocumentCode
3041004
Title
UNION: A unified inter/intra-chip optical network for chip multiprocessors
Author
Wu, Xiaowen ; Ye, Yaoyao ; Zhang, Wei ; Liu, Weichen ; Nikdast, Mahdi ; Wang, Xuan ; Xu, Jiang
Author_Institution
Dept. of Electr. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
fYear
2010
fDate
17-18 June 2010
Firstpage
35
Lastpage
40
Abstract
As modern computing systems become increasingly complex, communication efficiency among and inside chips has become as important as the computation speeds of individual processor cores. Traditionally, inter-chip and intra-chip communication architectures are separately designed to maximize design flexibility under different constraints. However, jointly designing communication architectures for both inter-chip and intra-chip communication could potentially yield better solutions. In this paper, we present a unified inter/intra-chip optical network, called UNION, for chip multiprocessors (CMP). UNION is based on recent progress in nano-photonic technologies. It connects not only processors on a single CMP but also multiple CMPs in a system. UNION employs a hierarchical optical network to separate inter-chip communication traffic from intra-chip communication traffic. It fully utilizes a single optical network to transmit both payload packets and control packets. The network controller on each CMP not only manages intra-chip communications but also collaborate with each other to facilitate inter-chip communications. We compared CMPs using UNION with those using a matched electronic counterpart in 45 nm process. Based on eight applications, simulation results show that on average UNION improves CMP performance by 3.1X while reducing 92% of network energy consumption and 52% of communication delay.
Keywords
microprocessor chips; multiprocessing systems; UNION; chip multiprocessors; communication architectures; inter-chip communication; intra-chip communication; unified inter/intra-chip optical network; Communication system control; Computer architecture; Computer networks; Integrated circuit interconnections; Integrated optics; Network-on-a-chip; Optical computing; Optical fiber networks; Optical interconnections; Optical waveguides;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures (NANOARCH), 2010 IEEE/ACM International Symposium on
Conference_Location
Anaheim, CA
Print_ISBN
978-1-4244-8020-3
Type
conf
DOI
10.1109/NANOARCH.2010.5510930
Filename
5510930
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