Field-programmable gate array (FPGA) firmware for the Fermilab E906 (SeaQuest) trigger

Scintillating hodoscopes trigger firmware in a field-programmable gate array (FPGA) was implemented in a commercially-off-the-shelf 6U VMEbus module for the Fermilab E906 (SeaQuest) experiment. The FPGA receives up to 96-channel inputs and digitizes the leading edge time at 1 ns (LSB) resolution using time-to-digital converter (TDC) blocks in the firmware. Digital processes on the outputs of the TDC include adjusting delay channel-by-channel in 1-ns steps, setting coincidence range and re-align with the accelerator bucket clock. The re-aligned hits are further processed in trigger matrices. E906 uses four scintillating hodoscopes and various 3-out-of-4 (or 4-out-of-4) majority coincidence logic is used to generate valid track information as trigger primitives to form a final global trigger. Zero-suppressed TDC data are read out for each event and thus the module could be used as a 96-channel TDC beyond the functionality if trigger matrices.