Development of a White Rabbit interface for synchronous data acquisition and timing control

Sub-nanosecond precision timing distribution and control are key techniques in various distributed real-time applications, where the proposed White Rabbit (WR) project provides a solution combining both data transmission and timing control via the same media. This paper demonstrates the design and development of a compact, standalone WR node following FPGA Mezzanine Card (FMC) standard, which would work as a common WR interface to different applications. Test results show that the timestamp synchronization precision of 65ps (RMS) has been observed between the node and a WR switch, and the data throughput of over 0.3Gbps has been verified in a preliminary test between the node and a PC host.