DocumentCode
3041792
Title
A native-oxide-free process for 4 nm capacitor dielectrics
Author
Nakano, M. ; Shinmura, N. ; Iguchi, K. ; Watanabe, T. ; Sakiyama, K.
Author_Institution
Sharp Corp., Nara, Japan
fYear
1992
fDate
2-4 June 1992
Firstpage
16
Lastpage
17
Abstract
An integrated process, composed of a vapor HF processor, a wafer carrier box with N/sub 2/ flow, and an SiN LPCVD system with N/sub 2/ flow load-lock, for realizing native-oxide free SiN formation is discussed. It has been found that an ON film having the equivalent oxide thickness of 4 nm can be obtained and further improvement may be possible. Therefore, it is expected to be a promising technology for the 64-Mb DRAM and beyond.<>
Keywords
DRAM chips; capacitors; chemical vapour deposition; integrated circuit technology; nitridation; silicon compounds; 4 nm; DRAM; LPCVD system; SiN formation; capacitor dielectrics; equivalent oxide thickness; flow load-lock; native-oxide-free process; wafer carrier box; Capacitors; Cleaning; Dielectrics; Furnaces; Hafnium; Rapid thermal processing; Silicon compounds; Substrates; Thermal loading; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1992. Digest of Technical Papers. 1992 Symposium on
Conference_Location
Seattle, WA, USA
Print_ISBN
0-7803-0698-8
Type
conf
DOI
10.1109/VLSIT.1992.200621
Filename
200621
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