DocumentCode :
3041887
Title :
The d-DotFET: MOSFET based on locally strained silicon
Author :
Gerharz, J.C. ; Moers, J. ; Mussler, Gregor ; Grutzmacher, D.
Author_Institution :
Peter Grunberg Inst. PGI 9, Forschungszentrum Julich, Julich, Germany
fYear :
2012
fDate :
11-15 Nov. 2012
Firstpage :
139
Lastpage :
142
Abstract :
In the d-DotFET device the strain introduced into a silicon capping layer grown on top of an ordered array of Ge islands is used. To achieve ordering and prevent randomly distribution of the Ge islands during epitaxial growth of Ge on silicon, template assisted self organization is utilized: the Si substrate is patterend by E-Beam lithography and subsequent reactive ion etching. During epitaxial growth by MBE the Ge islands grow in the predefined holes only, thus the position of the dots can be determined with a lateral accuracy of ±5 nm. This allows the alignment of the active device area to individual dots, thus utilizing the locally strained silicon layer. For MOSFETs were the dot will be preserved in the device, mobility enhancement of 22.5% can be achieved [1,2], while removing the dot leads to an mobility enhancement of 35%.
Keywords :
MOSFET; electron beam lithography; elemental semiconductors; germanium; molecular beam epitaxial growth; self-assembly; semiconductor epitaxial layers; silicon; sputter etching; E-beam lithography; Ge islands; MBE; MOSFET; Si; Si-Ge; active device area; d-DotFET device; epitaxial growth; locally strained silicon layer; mobility enhancement; ordered array; reactive ion etching; silicon capping layer; silicon substrate; template assisted self organization; Etching; Lithography; Logic gates; Silicon; Strain; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Devices & Microsystems (ASDAM), 2012 Ninth International Conference on
Conference_Location :
Smolenice
Print_ISBN :
978-1-4673-1197-7
Type :
conf
DOI :
10.1109/ASDAM.2012.6418228
Filename :
6418228
Link To Document :
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