DocumentCode :
3041928
Title :
Novel Multi-Bit Non-Volatile SRAM Cells for Runtime Reconfigurable Computing
Author :
Yanjun Ma
Author_Institution :
Intellectual Ventures, Bellevue, WA, USA
fYear :
2015
fDate :
17-20 May 2015
Firstpage :
1
Lastpage :
4
Abstract :
We discuss non-volatile SRAM cells capable of storing multiple bits and their applications as multi-context configuration memory. The cells are based on the standard 6T SRAM with multiple pairs of programmable resistors such as magnetic tunnel junction or resistive memory elements. In one of the cell designs the active state of the SRAM can be switched in one clock cycle by the use of an additional equalizer transistor, without the need to turn off the power to the cell, allowing real-time and low energy switching between different contexts in reconfigurable circuits. Other variations of the multistate non-volatile SRAM cells are also discussed.
Keywords :
SRAM chips; logic design; magnetic tunnelling; reconfigurable architectures; resistive RAM; resistors; switching circuits; transistor circuits; cell designs; clock cycle; equalizer transistor; low energy switching; magnetic tunnel junction; multibit nonvolatile SRAM cells; multicontext configuration memory; multistate nonvolatile SRAM cells; programmable resistors; reconfigurable circuits; resistive memory elements; runtime reconfigurable computing; Magnetic tunneling; Nonvolatile memory; Resistance; Resistors; SRAM cells; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Workshop (IMW), 2015 IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4673-6931-2
Type :
conf
DOI :
10.1109/IMW.2015.7150297
Filename :
7150297
Link To Document :
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