Title :
On-chip stimuli generation for post-silicon validation
Author :
Nicolici, Nicola
Author_Institution :
Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, ON, Canada
Abstract :
In contrast to pre-silicon verification environments, insystem validation is not strongly constrained by the number of stimuli that can be applied; rather, the quality of the patterns, as well as the observation of the events of interest are the real concern. This paper motivates the need for developing structured methods for porting the controllability aspects of pre-silicon verification into post-silicon validation environments. Use cases and challenges for such methods are outlined.
Keywords :
VLSI; elemental semiconductors; integrated circuit design; silicon; Si; insystem validation; on-chip stimuli generation; post-silicon validation environments; pre-silicon verification environments; structured methods; Built-in self-test; Controllability; Debugging; Manufacturing; Prototypes; Silicon; System-on-a-chip;
Conference_Titel :
High Level Design Validation and Test Workshop (HLDVT), 2012 IEEE International
Conference_Location :
Huntington Beach, CA
Print_ISBN :
978-1-4673-2897-5
DOI :
10.1109/HLDVT.2012.6418251
