Title :
VHDL-AMS implementation of a numerical ballistic CNT model for logic circuit simulation
Author :
Zhou, Dafeng ; Kazmierski, Tom J. ; Al-Hashimi, Bashir M.
Author_Institution :
Sch. of Electron. & Comput. Sci., Univ. of Southampton, Southampton
Abstract :
This paper introduces a novel numerical carbon nanotube transistor (CNT) modelling approach which brings in a flexible and efficient cubic spline non-linear approximation of the non-equilibrium mobile charge density. The spline algorithm creates a rapid and accurate solution of the numerical relationship between the charge density and the self-consistent voltage, which leads to the speed-up of deriving the current through the channel without losing much accuracy. This modelling method also allows the flexibility of choosing different cubic spline intervals which may affect the performance of the model, but it is still capable of obtaining an acceleration of more than a 100 times while maintaining the accuracy within less than 1.5% normalised RMS error compared with previous reported theoretical modelling approach. The model has been proved working as transistors in a logic inverter implemented using VHDL-AMS and simulated in SystemVision, which shows the availability of implementing a circuit-level simulators with our proposed model. Additionally, although this model is originally based on the ideal ballistic transport characteristics, it shows good flexibility that the extension with numbers of non-ballistic features are certainly acceptable.
Keywords :
carbon nanotubes; hardware description languages; logic circuits; SystemVision; VHDL-AMS implementation; ballistic transport characteristics; circuit-level simulators; cubic spline nonlinear approximation; logic circuit simulation; logic inverter; non-equilibrium mobile charge density; numerical ballistic CNT model; numerical carbon nanotube transistor modelling; spline algorithm; Acceleration; Carbon nanotubes; Circuit simulation; Integral equations; Logic circuits; Mathematical model; Numerical models; Spline; Transistors; Voltage;
Conference_Titel :
Specification, Verification and Design Languages, 2008. FDL 2008. Forum on
Conference_Location :
Stuttgart
Print_ISBN :
978-1-4244-2264-7
DOI :
10.1109/FDL.2008.4641428