Title :
A high performance low temperature 0.3 mu m CMOS on SIMOX
Author :
Shahidi, G.G. ; Davari, B. ; Bucelot, T. ; Zicherman, D. ; McFarland, P. ; Fink, A. ; Brodsky, S. ; Pettrilo, K. ; Mazzeo, N. ; Lombardi, R. ; Rodriguez, M. ; Polcari, M. ; Ning, T.H.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
It is shown that ultrathin SOI offers a device design advantage for operation of CMOS circuits at 77 K. The use of ultrathin SOI makes it possible to achieve low threshold at relatively high channel doping, which is necessary for reduction of short channel effects. Very-high-performance loaded NAND inverters (with delays of less than 100 ps at 2 V) were fabricated.<>
Keywords :
CMOS integrated circuits; SIMOX; integrated circuit technology; logic gates; low-temperature techniques; 0.3 micron; 100 ps; 77 K; CMOS on SIMOX; delays; high channel doping; loaded NAND inverters; low threshold; short channel effects; ultrathin SOI; Breakdown voltage; Capacitors; Doping; Fabrication; Inverters; MOS devices; Paper technology; Ring oscillators; Silicon; Temperature;
Conference_Titel :
VLSI Technology, 1992. Digest of Technical Papers. 1992 Symposium on
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-0698-8
DOI :
10.1109/VLSIT.1992.200671
