• DocumentCode
    3042717
  • Title

    Clock Number Reduction Abstraction on CEGAR Loop Approach to Timed Automaton

  • Author

    Okano, Kozo ; Bordbar, Behzad ; Nagaoka, Takeshi

  • Author_Institution
    Grad. Sch. of Inf. Sci. & Technol., Osaka Univ., Suita, Japan
  • fYear
    2011
  • fDate
    Nov. 30 2011-Dec. 2 2011
  • Firstpage
    235
  • Lastpage
    241
  • Abstract
    This paper presents an adaptation of the CEGAR loop approach based on the reduction of the number of clocks in timed automata. In the presented method, an abstraction of the timed automata in which some of the clocks are removed is used to search for a counter-example for a given temporal logic statement. If the counter-example produced by the abstracted timed automaton is not a counter-example of the original timed automaton, the abstracted model is refined by restoring some of the clocks so that the process can be repeated for the new abstracted model. Reducing the number of the clock may result in a substantial reduction in the amount of the computation required for the model checking as the number states is exponential in the number of clocks.
  • Keywords
    automata theory; formal verification; temporal logic; CEGAR loop approach; abstracted timed automaton; clock number reduction abstraction; model checking; temporal logic; Analytical models; Automata; Clocks; Computational modeling; Educational institutions; Presses; Semantics; Abstraction; CEGAR loop; Timed Automata;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Networking and Computing (ICNC), 2011 Second International Conference on
  • Conference_Location
    Osaka
  • Print_ISBN
    978-1-4577-1796-3
  • Type

    conf

  • DOI
    10.1109/ICNC.2011.42
  • Filename
    6131812