A low power 32 nanometer CMOS digitally controlled oscillator

Author

Zhao, Jun ; Kim, Yong-Bin

Author_Institution

Northeastern Univ., Boston, MA

fYear

2008

fDate

17-20 Sept. 2008

Firstpage

183

Lastpage

186

Abstract

In this paper, a low power and low jitter 12-bit CMOS digitally controlled oscillator (DCO) design is presented. The CMOS DCO design is based on a ring oscillator implemented with Schmitt trigger based inverters. Simulations of the proposed DCO using 32 nm predictive transistor model (PTM) achieve controllable frequency range of around 570 MHz~850 MHz with a wide range of linearity. Monte Carlo simulation demonstrates that the time-period jitter due to random power supply fluctuation is under 75 ps and the power consumption is 2.3 mW at 800 MHz and 0.9 power supply.

Keywords

CMOS integrated circuits; Monte Carlo methods; digital control; invertors; nanotechnology; oscillators; transistors; trigger circuits; Monte Carlo simulation; Schmitt trigger based inverters; frequency 800 MHz; nanometer CMOS digitally controlled oscillator; power 2.3 mW; power consumption; predictive transistor model; random power supply fluctuation; ring oscillators; size 32 nm; time-period jitter; Digital control; Frequency; Inverters; Jitter; Linearity; Power supplies; Predictive models; Ring oscillators; Semiconductor device modeling; Trigger circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2008 IEEE International

Conference_Location

Newport Beach, CA

Print_ISBN

978-1-4244-2596-9

Electronic_ISBN

978-1-4244-2597-6

Type

conf

DOI

10.1109/SOCC.2008.4641507

Filename

4641507