• DocumentCode
    3044026
  • Title

    Supply voltage selection in Voltage Island based SoC design

  • Author

    Sengupta, Dipanjan ; Saleh, Resve

  • Author_Institution
    Dept. of ECE, SoC Lab., Vancouver, BC
  • fYear
    2008
  • fDate
    17-20 Sept. 2008
  • Firstpage
    219
  • Lastpage
    222
  • Abstract
    Voltage Island design is one of the most popular techniques for energy efficient system-on-chip (SoC) designs. We propose a new cost function for voltage selection that incorporates information about the connectivity among cores, and investigate its benefits when applied early in the voltage island design process. Additionally, certain placement constraints are applied to island formation to provide more realistic scenarios in SoC design. Experimental results show that, using the new cost function, we can achieve on average 7% power reduction and 1-4% area reduction compared to previous work.
  • Keywords
    low-power electronics; system-on-chip; SoC design; Voltage Island design; power reduction; supply voltage selection; system-on-chip designs; Constraint optimization; Cost function; Dynamic programming; Energy consumption; Energy efficiency; Potential energy; Process design; System-on-a-chip; Timing; Voltage fluctuations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference, 2008 IEEE International
  • Conference_Location
    Newport Beach, CA
  • Print_ISBN
    978-1-4244-2596-9
  • Electronic_ISBN
    978-1-4244-2597-6
  • Type

    conf

  • DOI
    10.1109/SOCC.2008.4641515
  • Filename
    4641515