DocumentCode :
3044072
Title :
An efficient lossless embedded compression engine using compacted-FELICS algorithm
Author :
Lee, Yu-Yu ; Lee, Yu-Hsuan ; Tsai, Tsung-Han
Author_Institution :
DSP/VLSI Lab. Dept. of Electron. Eng., Nat. Central Univ., Jhongli
fYear :
2008
fDate :
17-20 Sept. 2008
Firstpage :
233
Lastpage :
236
Abstract :
The memory bandwidth and capacity have become a critical design issue in display media chip for high-end display applications. In this paper, the lossless embedded compression engine using compacted-FELICS algorithm, which primarily consists of adjusted binary code and Golomb-Rice code, is proposed to handle this scenario. The encoding capability of its VLSI architecture can achieve Full-HD 1080p@60Hz. The prototype chip is implemented by TSMC 0.18-um with Artisan cell library, and its core size is 0.98 mm x 0.97 mm.
Keywords :
VLSI; binary codes; liquid crystal displays; Artisan cell library; Golomb-Rice code; VLSI architecture; binary code; compacted-FELICS algorithm; display media chip; encoding capability; high definition display; high-end display application; liquid crystal display panel technology; lossless embedded compression engine; memory bandwidth; size 0.18 mum; Bandwidth; Binary codes; Costs; Encoding; Heat engines; High definition video; Image coding; Liquid crystal displays; Random access memory; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2008 IEEE International
Conference_Location :
Newport Beach, CA
Print_ISBN :
978-1-4244-2596-9
Electronic_ISBN :
978-1-4244-2597-6
Type :
conf
DOI :
10.1109/SOCC.2008.4641518
Filename :
4641518
Link To Document :
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