DocumentCode :
3045707
Title :
Adaptive spread spectrum clock tracking for interpolator-based clock and data recovery
Author :
Khor, Chuan-Thim ; Chai, Alan
Author_Institution :
IC Design Eng., Altera Corp., Bayan Lepas, Malaysia
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
348
Lastpage :
351
Abstract :
A 3Gb/s half-rate interpolator-based clock and data recovery (i-CDR) with asynchronous spread spectrum clock (SSC) tracking capability is presented. The i-CDR comprises a proportional path to track phase error and an integral path to compensate frequency offset. The integral path consists of ppm detector and ppm decoder with a combiner acts as the integration point between the two paths. The ppm decoder exploits averaging algorithm to facilitate wide range ppm tracking for triangular modulation profiles. The i-CDR, implemented in TSMC 60nm LP 1P11M CMOS technology occupies an active area of 390μm × 800μm and consumes 48.8mA from a 1.2V power supply when operated at 3Gb/s. Silicon measurements substantiate that the i-CDR has ppm tolerance up to +/-5000ppm.
Keywords :
CMOS integrated circuits; asynchronous circuits; clock and data recovery circuits; clocks; CMOS technology; adaptive spread spectrum clock tracking; asynchronous spread spectrum clock; bit rate 3 Gbit/s; current 48.8 mA; interpolator-based clock and data recovery; ppm decoder; ppm detector; size 390 mum; size 60 nm; size 800 mum; triangular modulation; voltage 1.2 V; Clocks; Decoding; Detectors; Equations; Integrated circuits; Modulation; Radiation detectors; interpolator-based clock and data recovery (i-CDR); ppm; spread spectrum clock (SSC);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2011 13th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-61284-863-1
Type :
conf
DOI :
10.1109/ISICir.2011.6131968
Filename :
6131968
Link To Document :
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