Considerations for use of high pin count, multilayer PBGAs in engineering workstations

Area array surface mount packaging is an attractive alternative to high pin count leaded or through-hole packaging technologies due to the reduced area of real estate needed on mother-boards. When considered for use in high performance systems, such as Engineering Workstations, a number of factors must be evaluated. This paper reviews a number of key areas for consideration for the use of high pin count (>350 pins), multilayer (>2 metal layer) Plastic Ball Grid Arrays (PBGAs), which utilize printed circuit board materials as the substrate. While the introduction of PBGAs has been accelerating, most of those introductions have concentrated on lower pin count, 2 metal layer (single core) substrate, overmolded packages