The phase locked loop for MEMS horizontal scanning control of micro-laser projection ASIC

A phase locked loop (PLL) for MEMS horizontal scanning control of micro-laser projection ASIC is demonstrated for pico projectors application using high voltage 0.18-μm CMOS process. Special design techniques of phase frequency detector(PFD) and VCO control voltage with resetting are proposed to achieve resetting initial phase of horizontal scanning control, which make sure the PLL have stable performance when system power on. The PLL generates 142MHz signal with LVDS buffer also, which is used for generating timing signals providing a 1/8-pixel resolution for vertical control. The 142MHz of PLL has the measured phase noise of -112dBc/Hz at 1MHz offset and the integrated RMS jitter is 963ps from 100Hz to 10MHz. The active die area is 1mm × 1mm. The chip operates over a wide range of supply voltage from 1.6 V to 2.0V and temperature from -40°C to +85°C. The PLL chip core draws 6 mA current from a +1.8V supply at +25°C.