An improved dynamic-biased CMOS operational amplifier for biomedical circuit applications

An improved dynamic-biased CMOS operational amplifier for biomedical circuits is presented in this paper. The proposed ultra-low power operational amplifier comprises a weak-inversion biased differential input stage, a pseudo class-AB output stage and a multi-phase master bias dynamic biasing circuit. Using GLOBALFOUNDRIES 0.18 μm CMOS process, the proposed amplifier, without dyamic biasing circuit, consumes a static supply current of 5.94 μA at a 1.8V supply. The simulated result shows a DC gain of 89.63dB and an unity gain bandwidth of 2.55 MHz at a capacitive load of 30.5 pF. When activating the proposed dynamic biasing circuit to the same amplifier in a reported sample-and-hold (S/H) circuit for biomedical application, the S/H circuit consumes 8.16 μW at a sampling frequency of 128 kHz. In response to 1-Vpp and 1-kHz sinusoidal input, the S/H circuit has achieved -76.67 dB of total harmonic distortion (equivalent to 12.73 bits of linearity-based ENOB) and 5.21×10-3 μA/MHz of Figure of Merit.