DocumentCode :
3046570
Title :
A study of the effect of shallow trench isolation technology on MOSFET DC characteristic
Author :
Fang, Xia ; Sun, Lingling ; Liu, Jun ; Wang, Huang
Author_Institution :
Key Lab. for RF Circuits & Syst. of Minist. of Educ., Hangzhou Dianzi Univ., Hangzhou, China
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
520
Lastpage :
523
Abstract :
An investigation of the effect of Shallow trench isolation (STI) technology on DC characteristic is presented. STI parameter of SA/SB impact on device characteristic is mainly considered, and discovered the small width device has different variation trench. Through comparing Agilent ICCAP simulation data with experimental data wafers fabricated using SMIC 0.13μm technology find that BSIM4 STI model is very well to fit all size devices except small width device. We design eight active lengths (i.e. SA=0.4μm, 0.8μm, 1.2μm, 1.6μm, 2.0μm, 2.4μm, 2.8μm and 3.2μm, and SA=SB) both PMOS and NMOS. Dependence of threshold voltage (Vth) on SA/SB is shown.
Keywords :
MOSFET; isolation technology; Agilent ICCAP simulation; MOSFET DC characteristic; SA/SB impact; SMIC technology; STI; device characteristic; shallow trench isolation technology; size 0.13 mum; Data models; Integrated circuit modeling; Layout; MOS devices; Mathematical model; Semiconductor device modeling; Stress; BSIM4; Shallow trench isolation (STI); Vth; compact model;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2011 13th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-61284-863-1
Type :
conf
DOI :
10.1109/ISICir.2011.6132011
Filename :
6132011
Link To Document :
بازگشت