DocumentCode
3046763
Title
Automated test pattern generation for analog integrated circuits
Author
Verhaegen, Wim ; Van der Plas, Geert ; Gielen, Georges
Author_Institution
ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
fYear
1997
fDate
27 Apr-1 May 1997
Firstpage
296
Lastpage
301
Abstract
An algorithm for the generation of tests for analog integrated circuits is proposed. It starts from a generated fault list and ranges specified by the user and determines optimal test signals that maximize the detectability of all faults. As statistical fluctuations have to be considered when evaluating analog circuits, it is based on a statistical test criterion. Two examples demonstrate the practical use and versatility of this approach
Keywords
VLSI; analogue integrated circuits; automatic test software; integrated circuit testing; ATPG algorithm; analog integrated circuits; automated test pattern generation; generated fault list; optimal test signals; statistical fluctuations; statistical test criterion; Analog circuits; Analog integrated circuits; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Fluctuations; Integrated circuit testing; Signal generators; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1997., 15th IEEE
Conference_Location
Monterey, CA
ISSN
1093-0167
Print_ISBN
0-8186-7810-0
Type
conf
DOI
10.1109/VTEST.1997.600291
Filename
600291
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