Title :
Special purpose array processor implementation of neural networks
Author :
King, S.Y. ; Vlontzos, John
Author_Institution :
Princeton Univ., NJ, USA
Abstract :
A universal digital VLSI design for implementing artificial neural networks is proposed. The design is based on a unified iterative neural network model. An implementation based on a combination of custom-built and commercially available chips is presented. In addition, a software environment for the array processor is discussed
Keywords :
VLSI; neural nets; parallel architectures; parallel machines; array processor implementation; artificial neural networks; commercially available chips; software environment; unified iterative neural network model; universal digital VLSI design; Artificial neural networks; Costs; Hardware; Hidden Markov models; Logic; Neural networks; Scalability; Silicon; Systolic arrays; Very large scale integration;
Conference_Titel :
Tools for Artificial Intelligence, 1990.,Proceedings of the 2nd International IEEE Conference on
Conference_Location :
Herndon, VA
Print_ISBN :
0-8186-2084-6
DOI :
10.1109/TAI.1990.130322
