The implementation of a speech synthesis algorithm

The application of integrated circuit technology to Speech Synthesis and Recognition represents an important development in the field. This paper describes a complete Speech Synthesis System on a single chip. The considerations involved in the choice of a compatible algorithm, machine word length and coefficient accuracy are discussed. The device contains a 32 word vocabulary and an innovative implementation of the LPC lattice structure. It operates at a variable bit rate to provide high quality speech with low bit storage requirements. The software supporting the Speech Synthesis System is also described.