Title :
Rapid prototyping using laser created interconnects
Author :
Lee, Rex ; Moreno, Wilfrido ; Saini, Nitin
Author_Institution :
Center for Microelectron. Res., Univ. of South Florida, Tampa, FL, USA
Abstract :
The Laser Restructuring Laboratory at the Center for Microelectronics Research (CMR) has pursued rapid prototyping technologies for electronic systems using novel laser restructuring techniques. Laser restructuring of electronic circuits offers great potential for a low-cost, quick turn around alternative to customized product verification before commitment to mass production. Laser created interconnects in integrated circuits (ICs) at the wafer or packaged chip level is accomplished by creating low electrical resistance links between conductor lines. The primary focus of this paper is to report a new interconnect that has been developed at CMR. This new interconnect has the potential for not only quick prototyping of electronics circuit applications but also for substrate level interconnect routing in multichip modules. The developed laser vertical link (LVL), the 4- 2 LVL, has resistance values below 5 Ω and shows no leakage to substrate after laser processing. A new test chip TC8.1 was designed at CMR and fabricated with 7 different viable interconnects. The test structures were designed with four point probe capabilities for accurate resistance measurements. Using Design of Experiment techniques supported by statistical data analysis this interconnect was studied. The optimum set of laser parameters were arrived at by optimizing the statistical model. Results of the full characterization of this interconnect are presented
Keywords :
VLSI; integrated circuit interconnections; integrated circuit metallisation; laser beam applications; multichip modules; statistical analysis; conductor lines; design of experiment techniques; integrated Circuits; laser created interconnects; laser restructuring techniques; laser vertical link; low electrical resistance links; multichip modules; rapid prototyping; statistical data analysis; statistical model; substrate level interconnect routing; Electric resistance; Electronic circuits; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Laboratories; Mass production; Microelectronics; Prototypes;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1994. Low-Cost Manufacturing Technologies for Tomorrow's Global Economy. Proceedings 1994 IEMT Symposium., Sixteenth IEEE/CPMT International
Conference_Location :
La Jolla, CA
Print_ISBN :
0-7803-2037-9
DOI :
10.1109/IEMT.1994.404737