Title :
Scalable video with background segmentation
Author :
Nicholls, J.A. ; Monro, D.M.
Author_Institution :
Sch. of Electron. & Electr. Eng., Bath Univ., UK
Abstract :
Intelligent identification of background and foreground in video scenes is used for gain compression. This is implemented as a two layer object model in a software-only video compressor with a bit rate range from less than 10 kbps up to to 1.2 Mbps. Quadtree decomposition on an error metric between the input and transmitted images directs the coder towards a foreground layer of active image fragments. A rate buffering system limits the bandwidth by transmitting only the foreground blocks which most improve the image and are above some error threshold. A high fidelity background layer is identified and communicated to the decoder, which can be used to redraw background fragments as foreground objects move across them. Blocks can be coded by various methods, such as fractal transforms or truncated DCTs. This system can be implemented in RISC processors without the need for dedicated hardware. It is suitable for low bit rate applications with slowly varying backgrounds, such as personal video communications over packet networks, or closed circuit TV surveillance using fixed or wireless links
Keywords :
buffer storage; closed circuit television; coding errors; data compression; decoding; discrete cosine transforms; fractals; image segmentation; packet radio networks; quadtrees; reduced instruction set computing; television applications; transform coding; video coding; 10 kbit/s to 1.2 Mbit/s; RISC processors; active image fragments; background segmentation; background video scenes; bandwidth limitation; closed circuit TV surveillance; decoder; error metric; error threshold; foreground layer; foreground objects; fractal transforms; gain compression; high fidelity background layer; image block coding; intelligent identification; packet networks; personal video communications; quadtree decomposition; rate buffering system; scalable video; software only video compressor; truncated DCT; two layer object model; Bandwidth; Bit rate; Circuits; Decoding; Fractals; Hardware; Image coding; Layout; Reduced instruction set computing; Video compression;
Conference_Titel :
Image Processing, 1996. Proceedings., International Conference on
Conference_Location :
Lausanne
Print_ISBN :
0-7803-3259-8
DOI :
10.1109/ICIP.1996.560908