DocumentCode :
3047766
Title :
[Title page]
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
1
Lastpage :
1
Abstract :
The following topics are dealt with: vehicle-to-vehicle communication system; an architecture of optimised SIFT feature detection for an FPGA implementation of an image matcher; FPGA architectures; FPGA-based computing; reconfigurable architectures; high level language hardware synthesis; parallel spiking neural network simulator; least-squares Monte Carlo method; dynamic programming; and hardware-accelerated formal verification.
Keywords :
Monte Carlo methods; dynamic programming; feature extraction; field programmable gate arrays; formal verification; high level languages; image matching; least squares approximations; mobile radio; neural nets; reconfigurable architectures; simulation; FPGA architectures; SIFT feature detection; dynamic programming; hardware synthesis; hardware-accelerated formal verification; high level language; image matcher; least-squares Monte Carlo method; parallel spiking neural network simulator; reconfigurable architectures; vehicle-to-vehicle communication system;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4244-4375-8
Type :
conf
DOI :
10.1109/FPT.2009.5377599
Filename :
5377599
Link To Document :
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