Title :
The TU Delft sudoku solver on FPGA
Author :
Van der Bok, Kees ; Taouil, Mottaqiallah ; Afratis, Panagiotis ; Sourdis, Ioannis
Author_Institution :
Comput. Eng., Delft Univ. of Technol., Delft, Netherlands
Abstract :
Solving Sudoku puzzles is a mind-bending activity that many people enjoy during their spare time. As such, for those being acquainted with computers, it becomes an irresistible challenge to build a computing engine for Sudoku solving. Many Sudoku solvers have been developed recently, using advanced techniques and algorithms to speed-up the computation. In this paper, we describe a hardware design for an FPGA implementation of a Sudoku solver. Furthermore, we show the performance of the above design for solving puzzles of order N 3 to 15.
Keywords :
computer games; field programmable gate arrays; problem solving; FPGA; TU Delft sudoku solver; field programmable gate arrays; mind-bending activity; Algorithm design and analysis; Engines; Field programmable gate arrays; Frequency; Hardware; Humans; Logic; Random access memory; Read-write memory; Testing;
Conference_Titel :
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4244-4375-8
Electronic_ISBN :
978-1-4244-4377-2
DOI :
10.1109/FPT.2009.5377605
