DocumentCode
3048215
Title
FPGA vs. GPU for sparse matrix vector multiply
Author
Zhang, Yan ; Shalabi, Yasser H. ; Jain, Rishabh ; Nagar, Krishna K. ; Bakos, Jason D.
Author_Institution
Dept. of Comput. Sci. & Eng., Univ. of South Carolina, Columbia, SC, USA
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
255
Lastpage
262
Abstract
Sparse matrix-vector multiplication (SpMV) is a common operation in numerical linear algebra and is the computational kernel of many scientific applications. It is one of the original and perhaps most studied targets for FPGA acceleration. Despite this, GPUs, which have only recently gained both general-purpose programmability and native support for double precision floating-point arithmetic, are viewed by some as a more effective platform for SpMV and similar linear algebra computations. In this paper, we present an analysis comparing an existing GPU SpMV implementation to our own, novel FPGA implementation. In this analysis, we describe the challenges faced by any SpMV implementation, the unique approaches to these challenges taken by both FPGA and GPU implementations, and their relative performance for SpMV.
Keywords
coprocessors; field programmable gate arrays; sparse matrices; FPGA acceleration; FPGA implementation; GPU implementation; SpMV implementation; computational kernel; field programmable gate arrays; graphics processing unit; linear algebra computation; numerical linear algebra; precision floating-point arithmetic; programmability; sparse matrix vector multiplication; Acceleration; Biological system modeling; Biology computing; Computer architecture; Field programmable gate arrays; Kernel; Linear algebra; Scientific computing; Sparse matrices; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location
Sydney, NSW
Print_ISBN
978-1-4244-4375-8
Electronic_ISBN
978-1-4244-4377-2
Type
conf
DOI
10.1109/FPT.2009.5377620
Filename
5377620
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