Design analysis of nonhierarchical node-by-node routing virtual circuit networks

The author describes a novel approach to the design of node-by-node routing virtual circuit data networks. A major challenge in the design of such networks is to ensure that the network has loop-free alternate routing. The approach explicitly integrates the loop-free alternate routing requirements into the network design process and produces loop-free cost optimized networks. This is achieved by identifying a topology which supports loop-free alternate routing. This topology is optimal in the sense of achieving a prescribed level of network connectivity with the fewest possible links. This topology have several desirable routing properties, based on which a simple loop-free alternate routing scheme has been developed. Further, by solving an optimization problem, it is possible to find the optimal connectivity between nodes that minimizes the total link length. This leads to a significant reduction in network cost. Two methods for solving this optimization problem have been developed