Capability based, tightly coupled multiprocessor hardware to support a persistent global virtual memory

Author

Pose, Ronald D.

Author_Institution

Dept. of Comput. Sci., Monash Univ., Clayton, Vic., Australia

Volume

2

fYear

1989

fDate

3-6 Jan 1989

Firstpage

36

Abstract

A capability-based tightly coupled multiprocessor has been designed and constructed. The system supports a persistent global virtual memory in which objects representing processes, data and mechanisms for input/output reside. The hardware architecture of the machine and its addressing mechanisms are described. Addressing mechanisms that allow the persistent, global virtual memory to span multiprocessor boundaries and the support required for operation over wide area networks are discussed. The utility of uniform virtual addressing is emphasized, and its implementation in the Monash multiprocessor is described. The concept of an intermediate address space is introduced and its applicability to the implementation of a persistent, global virtual-memory architecture in a multiprocessor environment is demonstrated

Keywords

memory architecture; multiprocessing programs; multiprocessing systems; virtual storage; Monash multiprocessor; addressing mechanisms; capability-based tightly coupled multiprocessor; hardware architecture; intermediate address space; persistent global virtual memory; uniform virtual addressing; Bandwidth; Computer architecture; Computer science; Data processing; Data structures; Hardware; Memory architecture; Read-write memory; Wide area networks; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

System Sciences, 1989. Vol.II: Software Track, Proceedings of the Twenty-Second Annual Hawaii International Conference on

Conference_Location

Kailua-Kona, HI

Print_ISBN

0-8186-1912-0

Type

conf

DOI

10.1109/HICSS.1989.48057

Filename

48057