A multi-core architecture for face detection—Based on application specific instruction-set processor

A detection system, which could extract the face information from image or video frame, is becoming more and more important in lots of field, such as Computer vision, image processing, artificial intelligence and so on. In this paper, a multi core architecture, based on ASIP, is proposed for Viola and Jones´s algorithm. A novel scan strategy is adopted to make the data accessing more regular. Meanwhile, through multiple levels optimization of detection processing and the application-oriented ASIPs, the design is able to meet the overall demand. The architecture is prototyped on Altera Cyclone II FPGA, and the result shows that with lower resource consumption it performs real-time processing and high detection rate.