Dedicated parallel thinning architecture based on FPGA

Thinning is a widely used image processing method which can extract feature parameters from an image. Because of the time complexity caused by repetitive operations of thinning algorithm, many approaches have been done to obtain real-time performance. However, previous thinning algorithms have several limitations for thinning large volumes of data in the processing time aspect. This paper presents parallel thinning architecture and its FPGA-based implementation which can process thinning in real-time. The proposed system is evaluated using large volumes of real-world data and verified its real-time performance.