DocumentCode :
3052201
Title :
Resource Management of Manycores with a Hierarchical and a Hybrid Main Memory for MN-MATE Cloud Node
Author :
Park, Kyu Ho ; Park, Sung Kyu ; Hwang, Woomin ; Seok, Hyunchul ; Shin, Dong-Jae ; Park, Ki-Woong
Author_Institution :
Comput. Eng. Res. Lab., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
fYear :
2012
fDate :
24-29 June 2012
Firstpage :
301
Lastpage :
308
Abstract :
The advent of manycore in computing architecture causes severe energy consumption and memory wall problem. Emerging technologies such as on-chip DRAM and nonvolatile memory (NVRAM) receive attention as promising solutions for them. Nonvolatile memory is a viable DRAM replacement, achieving competitive performance at lower power consumption. On-chip DRAM extends the memory bandwidth. The confluence of these trends offers a new opportunity to rethink traditional computing system and memory hierarchies. In an attempt to mitigate the energy and memory wall, we propose MN-MATE, a novel architecture and management techniques for resource allocation of a number of cores, onchip DRAM, and large size of off-chip DRAM and NVRAM. In MN-MATE, each guest OS utilizes cores and various memories allocated by the hypervisor. Based on the knowledge about the allocated resources, a guest OS co-schedules tasks accessing different types of memory with complementary access intensity. Memory management system of the OS utilizes on-chip DRAM as a part of main memory having low latency. It also selects proper location of data from the three types of memory based on the data´s access characteristics. Preliminary experimental results show that these techniques with the new architecture improve system performance and reduce energy consumption.
Keywords :
DRAM chips; cloud computing; memory architecture; multiprocessing systems; operating systems (computers); processor scheduling; resource allocation; virtual machines; MN-MATE cloud node; NVRAM; computing architecture; guest OS; hierarchical main memory; hybrid main memory; hypervisor; manycore resource management; memory bandwidth; memory management system; memory wall problem; nonvolatile memory; offchip DRAM; onchip DRAM; operating system; resource allocation; severe energy consumption; task coscheduling; virtual machine; Bandwidth; Memory management; Monitoring; Nonvolatile memory; Random access memory; System-on-a-chip; NVRAM; hybrid main memory; resource management; scheduling; virtual machine;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Services (SERVICES), 2012 IEEE Eighth World Congress on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-3053-4
Type :
conf
DOI :
10.1109/SERVICES.2012.26
Filename :
6274065
Link To Document :
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