DocumentCode
3052303
Title
A floating point format for signal processing
Author
Eldon, John A. ; Robertson, Craig
Author_Institution
TRW LSI Products, La Jolla, CA
Volume
7
fYear
1982
fDate
30072
Firstpage
717
Lastpage
720
Abstract
Until recently, most real time signal processing has been done in fixed point, due to size, cost, and speed limitations of available hardware. However, the increased dynamic range, consistent precision, and automatic normalization of floating point make it a desirable goal. The same increase in performance that was attained a few years ago when general purpose computing accepted floating point should now be attainable in hardware-based signal processing. For general purpose computation, 32 bit floating point has become the single precision standard. However, the 24 bit significand of this format provides more precision than is needed or justified for most signal processing, requires a large amount of hardware, and cannot yet be realized at 10MHz in a single integrated circuit. Therefore, a compromise format of 22 bits, using a 16 bit significand and a 6 bit exponent, has been developed. This format is compatible with 16 bit fixed point. To support this format, TRW is developing a single chip 10MHz adder/subtractor and a single chip 10MHz multiplier.
Keywords
Application software; Costs; Design engineering; Digital signal processing chips; Dynamic range; Floating-point arithmetic; Hardware; Large scale integration; Signal processing; Software performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
Type
conf
DOI
10.1109/ICASSP.1982.1171532
Filename
1171532
Link To Document