Bit parallel-serial implementation of combinatorial filter in canonical form

Two new approaches to the implementation of combinatorial filters are proposed. One is to implement a combinatorial filter in canonical form instead of existing filters in direct form, by the bit serial method. The other is to realize a combinatorial basic second-order section in canonical form by two R-bit parallel-serial executions. With the latter proposed realization filters can operate at approximately R times the speed of the usual bit serial implementation. The roundoff-noise outputs from the canonical form of the combinatorial filter are analyzed for the case of fixed dynamic range. An arithmetic unit of the proposed combinatorial filters is installed in a CMOS LSI with 2000 gates. This digital filter LSI enables operating speeds which cannot be achieved by existing realizations.