Array probe card

Author

Beiley, Mark ; Ichishita, Faith ; Nguyen, Cuong ; Wong, Simon

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

fYear

1992

fDate

18-20 Mar 1992

Firstpage

28

Lastpage

31

Abstract

By utilizing conventional IC processing techniques, a membrane probe card has been fabricated on a silicon wafer and its functionality demonstrated. The probe card was able to provide a very large number of probe tips in an array form, permanently fixed in the X-Y plane via a transparent, flexible membrane. The use of an electrical current pulse, instead of a mechanical scrubbing motion, to break down the interfacial oxide has been demonstrated. The contact resistance was about 5×10^-5 Ω-cm². The new probe card offers smaller probe parasitics. The addition of the active test circuitry on the probe card would allow very high speed wafer level testing

Keywords

VLSI; hybrid integrated circuits; integrated circuit testing; modules; production testing; active test circuitry; array probe card; contact resistance; electrical current pulse; flexible membrane; functionality; high speed wafer level testing; interfacial oxide breakdown; large number of probe tips; membrane probe card; smaller probe parasitics; transparent membrane; Biomembranes; Circuit testing; Conductors; Impedance; Inductance; Packaging; Polyimides; Probes; Silicon; Sputter etching;

fLanguage

English

Publisher

ieee

Conference_Titel

Multi-Chip Module Conference, 1992. MCMC-92, Proceedings 1992 IEEE

Conference_Location

Santa Cruz, CA

Print_ISBN

0-8186-2725-5

Type

conf

DOI

10.1109/MCMC.1992.201439

Filename

201439