DocumentCode :
3052741
Title :
An analysis of ring oscillator PUF behavior on FPGAs
Author :
Eiroa, Susana ; Baturone, Iluminada
Author_Institution :
Dept. of Electron. & Electromagn., Univ. of Seville, Seville, Spain
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
1
Lastpage :
4
Abstract :
Many studies have been directed to probe ring oscillator PUF´s feasibility in the security field, but most of them suffer from the lack of global approach as they analyze the system isolated, giving an uncompleted theory about their behavior. This paper presents how adjacent hardware elements may affect PUF response, modifying their statistical characteristics and even masking the randomness of manufacturing process. This is a factor that should be taken into account when modeling the behavior of the ring oscillators in the PUF. Experimental results from Xilinx Spartan 3 FPGAs illustrate these issues.
Keywords :
field programmable gate arrays; oscillators; Xilinx Spartan 3 FPGA; adjacent hardware element; manufacturing process; physical unclonable function; ring oscillator PUF; statistical characteristics; Delay; Field programmable gate arrays; Hamming distance; Reliability; Ring oscillators; Security; PUF; Ring Oscillator; hardware security;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology (FPT), 2011 International Conference on
Conference_Location :
New Delhi
Print_ISBN :
978-1-4577-1741-3
Type :
conf
DOI :
10.1109/FPT.2011.6132673
Filename :
6132673
Link To Document :
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