A high-speed multi-dielectric capacitance-extraction algorithm for MCM interconnects

The authors report an extension of a stochastic algorithm for capacitance extraction in complex two- and three-dimensional multidielectric structures. The algorithm has applications in the area of circuit modeling of multichip modules. The extension is in the form of a simple probability rule that depends on the ratio of electric permittivities across dielectric interfaces. Computational results are presented for a two-dimensional cross-section of a wire running over a dielectric and ground plane. Results are also presented for a three-dimensional interconnect via partially embedded in a dielectric over a ground plane. All computations were performed on a personal computer. Execution times were nominally five minutes for statistical errors ranging from one to ten percent, depending on dimensionality and value of the dielectric constant. An extraction methodology was devised for large conductor arrays based on superimposing a geometrical hashing grid