A unified emulation/simulation environment for reconfigurable system-on-chip development

In this paper we present a simulation framework for rapid testing of custom hardware peripherals designed to be incorporated in a System on Chip (SoC) architecture. The QEMU processor emulator is extended to allow attaching a simulation environment to the system bus, such that simulation can perform bus transactions, and interact with the emulated processor. We demonstrate multiple levels of simulation fidelity with custom hardware simulation ranging from fast functionally equivalent C models through to Hardware In The Loop (HIL) co-simulation of production ready HDL code.