• DocumentCode
    3053112
  • Title

    Automating formal verification of customized soft-processors

  • Author

    Susanto, Kong Woei ; Luk, Wayne

  • Author_Institution
    Dept. of Comput., Imperial Coll. London, London, UK
  • fYear
    2011
  • fDate
    12-14 Dec. 2011
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Soft-processors, instruction processors implemented in FPGA technology, are often customizable to support domain-specific optimization. However the correctness of customized soft-processors, executing the associated machine code, is often not obvious. This paper proposes a novel approach for verifying the implementation of an application program for a customized soft-processor, based on the ACL2 theorem prover. The correctness proof involves verifying a machine code program executing on the target hardware device against a high-level specification of the application program. We illustrate the proposed approach with several case studies, showing how processors with different custom instructions and with different number of pipelined stages can be automatically produced and verified; such processors have a range of trade-offs in performance, size, power and energy consumption to meet different requirements.
  • Keywords
    field programmable gate arrays; formal specification; multiprocessing systems; program verification; theorem proving; ACL2 theorem prover; FPGA technology; correctness proof; customized soft-processor; domain-specific optimization; formal verification; high-level specification; instruction processor; machine code program verification; Frequency modulation; Hardware; Hardware design languages; Pipelines; Program processors; Random access memory; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2011 International Conference on
  • Conference_Location
    New Delhi
  • Print_ISBN
    978-1-4577-1741-3
  • Type

    conf

  • DOI
    10.1109/FPT.2011.6132692
  • Filename
    6132692