Title :
The Return of Silicon Efficiency
Abstract :
Summary form only given. The economic and physical forces which have always shaped the business of digital chip design are again evolving to change the priorities of designers. Key physical trends include the end of gate oxide thickness scaling, and the effect of small dopant populations on threshold voltage variance. Key economic trends include the need to tolerate specification shift and design error, and the need to amortize chip development cost over multiple market sockets.
Keywords :
application specific integrated circuits; elemental semiconductors; integrated circuit design; silicon; ASIC; EDA tools; digital chip design; gate oxide thickness scaling; processor-centric hardware platforms; silicon efficiency; software-defined functionality; threshold voltage variance; Application software; Application specific integrated circuits; Chip scale packaging; Costs; Hardware; Power generation economics; Silicon; Sockets; Threshold voltage; Time to market;
Conference_Titel :
Computer Arithmetic, 2007. ARITH '07. 18th IEEE Symposium on
Conference_Location :
Montepellier
Print_ISBN :
0-7695-2854-6
DOI :
10.1109/ARITH.2007.36