DocumentCode
3053670
Title
A low-power single-chip MPEG2 (half-D1) video codec LSI for portable consumer-products applications
Author
Hamamoto, Y. ; Taoka, M. ; Sugiyama, Y. ; Sugimoto, E. ; Urano, T.
Author_Institution
Sanyo Electr. Co. Ltd., Tokyo, Japan
fYear
1999
fDate
22-24 June 1999
Firstpage
50
Lastpage
51
Abstract
This paper describes the newly developed a low-power low-cost, single-chip MPEG2 (half-D1) video codec LSI for portable consumer-products applications. This LSI could encode and decode at 27 MHz with a power consumption of 0.5 W at 1.8 V.
Keywords
CMOS digital integrated circuits; code standards; consumer electronics; digital signal processing chips; large scale integration; telecommunication standards; video codecs; 0.5 W; 1.8 V; 27 MHz; CMOS IC; half-D1 video codec; low-cost LSI; low-power LSI; portable consumer-products applications; power consumption; single-chip MPEG2 video codec LSI; Bit rate; Decoding; Energy consumption; Image coding; Large scale integration; Pixel; SDRAM; Transform coding; Video codecs; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 1999. ICCE. International Conference on
Conference_Location
Los Angeles, CA, USA
Print_ISBN
0-7803-5123-1
Type
conf
DOI
10.1109/ICCE.1999.785163
Filename
785163
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